The present invention relates generally to computer systems, and in particular, to task allocation for improved multi-processor system operation.
Related art includes multi-processor systems having dynamic allocation of resources. Multi-processor systems having dynamic allocation of resources in general are old in the art. The article entitled "Signal Processing Through Macro Data Flow Architecture" by Plan et al, 1985 NAECON Proceedings, which is herein incorporated by reference, provides an overview of a multi-processor system.
Multi-processor systems combine multiple processors to gain increased processing bandwidth. However, the efficiency of such systems is significantly reduced by inefficient resource management implementations. For example, a high processing bandwidth capability may be only partially utilized if the processor is waiting for task assignments or waiting for data. Task assignments have been improved with dynamic allocation algorithms and data availability is improved with buffer memories, such as FIFOs, stacks, and cache memories. However, significant inefficiencies still exist. For example, one processor may be performing complex processing operations on an array of data while other processors are available for processing.
The Motorola 68000 microprocessor family includes many important processor features, such as stack, queue, and flag related operations, buses and dedicated input and output channels, and cache memory. See the "Motorola M68000 Programmer's Reference Manual", Prentice-Hall (1984), and the "MC68020 32-Bit Microprocessor User's Manual", Prentice-Hall (1984), which are herein incorporated by reference.